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| MAC4DCM, MAC4DCN Preferred Device Triacs Silicon Bidirectional Thyristors Designed for high volume, low cost, industrial and consumer applications such as motor control; process control; temperature, light and speed control. Features http://onsemi.com * * * * * * * * Small Size Surface Mount DPAK Package Passivated Die for Reliability and Uniformity Blocking Voltage to 800 V On-State Current Rating of 4.0 A RMS at 108C High Immunity to dv/dt - 500 V/ms at 125C High Immunity to di/dt - 6.0 A/ms at 125C Epoxy Meets UL 94, V-0 @ 0.125 in ESD Ratings: Human Body Model, 3B u 8000 V Machine Model, C u 400 V TRIACS 4.0 AMPERES RMS 600 - 800 VOLTS MT2 G MT1 MARKING DIAGRAMS 4 12 3 600 800 DPAK CASE 369C STYLE 6 MAXIMUM RATINGS (TJ = 25C unless otherwise noted) Rating Peak Repetitive Off-State Voltage (Note 1) (TJ = -40 to 125C, Sine Wave, 50 to 60 Hz, Gate Open) MAC4DCM MAC4DCN On-State RMS Current (Full Cycle Sine Wave, 60 Hz, TC = 108C) Peak Non-Repetitive Surge Current (One Full Cycle Sine Wave, 60 Hz, TJ = 125C) Circuit Fusing Consideration (t = 8.3 msec) Peak Gate Power (Pulse Width 10 msec, TC = 108C) Average Gate Power (t = 8.3 msec, TC = 108C) Peak Gate Current (Pulse Width 10 msec, TC = 108C) Peak Gate Voltage (Pulse Width 10 msec, TC = 108C) Operating Junction Temperature Range Storage Temperature Range Symbol VDRM, VRRM Value Unit V YWW AC 4DCx 4 A DPAK-3 CASE 369D STYLE 6 2 3 Y WW x = Year = Work Week = M or N YWW AC 4DCx IT(RMS) 4.0 ITSM 40 A 1 I2t PGM PG(AV) IGM VGM TJ Tstg 6.6 0.5 0.1 0.5 5.0 -40 to 125 -40 to 150 A2sec W PIN ASSIGNMENT W A V C C 1 2 3 4 Main Terminal 1 Main Terminal 2 Gate Main Terminal 2 ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. VDRM and VRRM for all types can be applied on a continuous basis. Blocking voltages shall not be tested with a constant current source such that the voltage ratings of the device are exceeded. (c) Semiconductor Components Industries, LLC, 2004 Preferred devices are recommended choices for future use and best overall value. 1 August, 2004 - Rev. 4 Publication Order Number: MAC4DCM/D MAC4DCM, MAC4DCN THERMAL CHARACTERISTICS Characteristic Thermal Resistance - Junction-to-Case Thermal Resistance - Junction-to-Ambient Thermal Resistance - Junction-to-Ambient (Note 2) Maximum Lead Temperature for Soldering Purposes (Note 3) Symbol RqJC RqJA RqJA TL Max 3.5 88 80 260 Unit C/W C ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise noted; Electricals apply in both directions) Characteristic OFF CHARACTERISTICS Peak Repetitive Blocking Current (VD = Rated VDRM, VRRM; Gate Open) ON CHARACTERISTICS Peak On-State Voltage (Note 4) (ITM = 6.0 A) Gate Trigger Current (Continuous dc) (VD = 12 V, RL = 100 W) MT2(+), G(+) MT2(+), G(-) MT2(-), G(-) Gate Trigger Voltage (Continuous dc) (VD = 12 V, RL = 100 W) MT2(+), G(+) MT2(+), G(-) MT2(-), G(-) Gate Non-Trigger Voltage (Continuous dc) (VD = 12 V, RL = 100 W) MT2(+), G(+); MT2(+), G(-); MT2(-), G(-) TJ = 125C Holding Current (VD = 12 V, Gate Open, Initiating Current = 200 mA) Latching Current (VD = 12 V, IG = 35 mA) MT2(+), G(+) MT2(+), G(-) MT2(-), G(-) DYNAMIC CHARACTERISTICS Characteristic Rate of Change of Commutating Current (VD = 400 V, ITM = 4.0 A, Commutating dv/dt = 18 V/msec, Gate Open, TJ = 125C, f = 250 Hz, CL = 5.0 mF, LL = 20 mH, No Snubber) (See Figure 16) Critical Rate of Rise of Off-State Voltage (VD = 0.67 X Rated VDRM, Exponential Waveform, Gate Open, TJ = 125C) Symbol di/dt(c) Min 6.0 Typ 8.4 Max - Unit A/ms VTM IGT 8.0 8.0 8.0 VGT 0.5 0.5 0.5 VGD IH IL - - - 30 50 20 60 80 60 0.2 6.0 0.8 0.8 0.8 0.4 22 1.3 1.3 1.3 - 35 V mA mA 12 18 22 35 35 35 V - 1.3 1.6 V mA TJ = 25C TJ = 125C IDRM, IRRM mA - - - - 0.01 2.0 Symbol Min Typ Max Unit dv/dt 500 1700 - V/ms 2. These ratings are applicable when surface mounted on the minimum pad sizes recommended. 3. 1/8 from case for 10 seconds. 4. Pulse Test: Pulse Width 2.0 msec, Duty Cycle 2%. ORDERING INFORMATION Device MAC4DCM-001 MAC4DCMT4 MAC4DCN-001 MAC4DCNT4 Package Type DPAK-3 DPAK DPAK-3 DPAK Package 369D 369C 369D 369C Shipping 75 Units / Rail 16 mm Tape & Reel (2.5 k / Reel) 75 Units / Rail 16 mm Tape & Reel (2.5 k / Reel) For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 2 MAC4DCM, MAC4DCN Voltage Current Characteristic of Triacs (Bidirectional Device) + Current Quadrant 1 MainTerminal 2 + Symbol VDRM IDRM VRRM IRRM VTM IH Parameter Peak Repetitive Forward Off-State Voltage Peak Forward Blocking Current Peak Repetitive Reverse Off-State Voltage Peak Reverse Blocking Current Maximum On-State Voltage Holding Current Quadrant 3 MainTerminal 2 - IH VTM IRRM at VRRM on state IH VTM off state + Voltage IDRM at VDRM Quadrant Definitions for a Triac MT2 POSITIVE (Positive Half Cycle) + (+) MT2 (+) MT2 Quadrant II (-) IGT GATE MT1 REF (+) IGT GATE MT1 REF Quadrant I IGT - (-) MT2 (-) MT2 + IGT Quadrant III (-) IGT GATE MT1 REF (+) IGT GATE MT1 REF Quadrant IV - MT2 NEGATIVE (Negative Half Cycle) All polarities are referenced to MT1. With in-phase signals (using standard AC lines) quadrants I and III are used. http://onsemi.com 3 MAC4DCM, MAC4DCN TC , MAXIMUM ALLOWABLE CASE TEMPERATURE ( C) P(AV) , AVERAGE POWER DISSIPATION (WATTS) 125 6.0 180 5.0 dc 120 a = 30 60 90 120 90 4.0 3.0 2.0 a = CONDUCTION ANGLE 115 110 a = CONDUCTION ANGLE 120 180 dc 3.5 4.0 a = 30 1.0 0 0 1.0 2.0 3.0 60 105 0 0.5 1.0 1.5 2.0 2.5 3.0 IT(RMS), RMS ON-STATE CURRENT (AMPS) 4.0 IT(RMS), RMS ON-STATE CURRENT (AMPS) Figure 1. RMS Current Derating Figure 2. On-State Power Dissipation I T, INSTANTANEOUS ON-STATE CURRENT (AMPS) TYPICAL @ TJ = 25C 10 MAXIMUM @ TJ = 125C r(t) , TRANSIENT RESISTANCE (NORMALIZED) 100 1.0 0.1 ZqJC(t) = RqJC(t)Sr(t) 1.0 MAXIMUM @ TJ = 25C 0.1 0 1.0 2.0 3.0 4.0 5.0 VT, INSTANTANEOUS ON-STATE VOLTAGE (VOLTS) 0.01 0.1 1.0 10 100 1000 10 k t, TIME (ms) Figure 3. On-State Characteristics Figure 4. Transient Thermal Response 60 VGT, GATE TRIGGER VOLTAGE(VOLTS) I GT, GATE TRIGGER CURRENT (mA) 50 40 30 Q2 20 10 0 -50 Q1 1.2 1.0 0.8 0.6 0.4 0.2 0 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (C) TJ, JUNCTION TEMPERATURE (C) Q2 Q3 Q1 Q3 Figure 5. Typical Gate Trigger Current versus Junction Temperature Figure 6. Typical Gate Trigger Voltage versus Junction Temperature http://onsemi.com 4 MAC4DCM, MAC4DCN 60 50 40 30 20 MT2 NEGATIVE 10 0 -50 MT2 POSITIVE 120 100 Q2 80 60 Q1 40 20 0 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (C) TJ, JUNCTION TEMPERATURE (C) Q3 IH , HOLDING CURRENT (mA) Figure 7. Typical Holding Current versus Junction Temperature IL, LATCHING CURRENT (mA) Figure 8. Typical Latching Current versus Junction Temperature 10 K TJ = 125C 8.0 K STATIC dv/dt (V/ m s) STATIC dv/dt (V/ m s) 15 K TJ = 125C VPK = 400 V 10 K 600 V 800 V 5.0 K 6.0 K 600 V 4.0 K 2.0 K 0 100 800 V VPK = 400 V 0 1000 RG-MT1, GATE-MT1 RESISTANCE (OHMS) 10 K 100 1000 RG-MT1, GATE-MT1 RESISTANCE (OHMS) 10 K Figure 9. Exponential Static dv/dt versus Gate-MT1 Resistance, MT2(+) Figure 10. Exponential Static dv/dt versus Gate-MT1 Resistance, MT2(-) 10 K TJ = 100C 14 K 12 K GATE OPEN STATIC dv/dt (V/ m s) 10 K 8.0 K 6.0 K 4.0 K 2.0 K 0 400 500 600 700 800 400 500 600 700 800 VPK, PEAK VOLTAGE (VOLTS) VPK, PEAK VOLTAGE (VOLTS) 125C 110C TJ = 100C 8.0 K STATIC dv/dt (V/ m s) GATE OPEN 6.0 K 110C 4.0 K 125C 2.0 K 0 Figure 11. Exponential Static dv/dt versus Peak Voltage, MT2(+) Figure 12. Exponential Static dv/dt versus Peak Voltage, MT2(-) http://onsemi.com 5 MAC4DCM, MAC4DCN 10 K 14 K GATE OPEN STATIC dv/dt (V/ m s) VPK = 400 V 6.0 K 600 V 4.0 K 800 V 2.0 K 0 100 105 110 115 120 125 TJ, JUNCTION TEMPERATURE (C) 12 K 10 K 8.0 K 6.0 K 800 V 4.0 K 2.0 K 0 100 105 110 115 120 125 TJ, JUNCTION TEMPERATURE (C) 600 V VPK = 400 V GATE OPEN 8.0 K STATIC dv/dt (V/ m s) Figure 13. Typical Exponential Static dv/dt versus Junction Temperature, MT2(+) 100 Figure 14. Typical Exponential Static dv/dt versus Junction Temperature, MT2(-) VPK = 400 V dv/dt(c), CRITICAL RATE OF RISE OF COMMUTATING VOLTAGE (V/ m s) TJ = 125C 10 100C 75C tw VDRM f= 1 2 tw 6f ITM 1000 (di/dt)c = 1.0 0 5.0 10 15 20 25 30 35 di/dt(c), RATE OF CHANGE OF COMMUTATING CURRENT (A/ms) Figure 15. Critical Rate of Rise of Commutating Voltage LL 200 VRMS ADJUST FOR ITM, 60 Hz VAC TRIGGER CHARGE CONTROL TRIGGER CONTROL MEASURE I 1N4007 CHARGE - + MT2 1N914 51 W G MT1 200 V NON-POLAR CL Note: Component values are for verification of rated (di/dt)c. See AN1048 for additional information. Figure 16. Simplified Test Circuit to Measure the Critical Rate of Rise of Commutating Current (di/dt)c http://onsemi.com 6 MAC4DCM, MAC4DCN PACKAGE DIMENSIONS DPAK CASE 369C ISSUE O NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.027 0.035 0.018 0.023 0.037 0.045 0.180 BSC 0.034 0.040 0.018 0.023 0.102 0.114 0.090 BSC 0.180 0.215 0.025 0.040 0.020 --- 0.035 0.050 0.155 --- MILLIMETERS MIN MAX 5.97 6.22 6.35 6.73 2.19 2.38 0.69 0.88 0.46 0.58 0.94 1.14 4.58 BSC 0.87 1.01 0.46 0.58 2.60 2.89 2.29 BSC 4.57 5.45 0.63 1.01 0.51 --- 0.89 1.27 3.93 --- -T- B V R 4 SEATING PLANE C E A S 1 2 3 Z U K F L D G 2 PL J H 0.13 (0.005) T DIM A B C D E F G H J K L R S U V Z M STYLE 6: PIN 1. MT1 2. MT2 3. GATE 4. MT2 SOLDERING FOOTPRINT 6.20 0.244 2.58 0.101 5.80 0.228 1.6 0.063 6.172 0.243 3.0 0.118 SCALE 3:1 mm inches http://onsemi.com 7 MAC4DCM, MAC4DCN PACKAGE DIMENSIONS DPAK-3 CASE 369D-01 ISSUE B B V R 4 C E NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.027 0.035 0.018 0.023 0.037 0.045 0.090 BSC 0.034 0.040 0.018 0.023 0.350 0.380 0.180 0.215 0.025 0.040 0.035 0.050 0.155 --- MILLIMETERS MIN MAX 5.97 6.35 6.35 6.73 2.19 2.38 0.69 0.88 0.46 0.58 0.94 1.14 2.29 BSC 0.87 1.01 0.46 0.58 8.89 9.65 4.45 5.45 0.63 1.01 0.89 1.27 3.93 --- Z A 3 S -T- SEATING PLANE 1 2 K F D G 3 PL J H 0.13 (0.005) M DIM A B C D E F G H J K R S V Z T STYLE 6: PIN 1. 2. 3. 4. MT1 MT2 GATE MT2 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 61312, Phoenix, Arizona 85082-1312 USA Phone: 480-829-7710 or 800-344-3860 Toll Free USA/Canada Fax: 480-829-7709 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2-9-1 Kamimeguro, Meguro-ku, Tokyo, Japan 153-0051 Phone: 81-3-5773-3850 ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative. http://onsemi.com 8 MAC4DCM/D |
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